Quote:
Originally Posted by nlite
240 MIPS versus 704 MIPS: why bother with the ARM :-)
I think I found a few ZSP500 opcodes:
Code:
f801 0100 mov r1,0x100
5d01 st r0,r1
5521 ld r2,r1
ae01 add r0,1
f000 fffd br -3
0000 nop
This is a bit of silly code to illustrate some debugger commands. In C-like notation: r1 = 0x100; while (1) { *r1 = r0; r2 = *r1; r0 += 1; }
The interesting thing is that mov and br seem to be 32-bit instructions here. |
WOW ! you are on something.
You are right, i read somewhere that ZSP500 instructions are a mix of 16 bits and 32 bits instructions.
Where/how did you find this code ???
